Internal
SERCOS Controller Hardware and Signal Structure
Both
PMC and CPCI XMP-SERCOS controllers are designed to be firmware-
and software-compatible with the standard MPI/XMP libraries,
while providing control to the SERCOS ASIC. All the motion blocks
normally found in the XMP are available on these controllers.
The XMP-SERCOS-PMC and XMP-SERCOS-CPCI controllers each contain
SERCOS ASICs, opto couplers, and control logic sufficient to
control 1 to 4 independent SERCOS rings. Each
ring is capable of independently supporting 2, 4, 8, 10, or
16MHz data rates.
Bit
Coding
SERCOS
signals are conveyed optically
as a series of discretely modulated light pulses from each
device's transmitter to the adjoining device's receiver. Information
is NRZI-coded (Non Return to Zero Inverted), with a retrievable
clock signal. Information is encoded using a 0 where
there is a transition, and a 1 where there is no transition.
To ensure that clock pulses remain retrievable from the transmitted
signal, zeros are forced (bit-stuffed) into the data stream
every eight bits.
A
full description of NRZI coding and SERCOS is included within
Section 5.5 of the publication entitled "Electrical Equipment
of Industrial Machines--Serial Data Link for Real-time Communication
Between Controls and Drives" from the International Electrotechnical
Commission.