Connect
to Digital Quadrature Encoders
Encoder
Wiring
Note
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The
100 ohm terminations to the receivers are software-selectable.
If you use the Scale Interpolation Module (SIM),
you must program the 100 ohm terminations off, i.e., remove
them from the circuit. To learn more about encoder termination,
please refer to Application
Note 206.
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Connect
to Differential
Encoders
Connect
to Single-ended
Encoders
Note
|
To
connect the XMP's differential line receivers to single-ended
encoders, you must add a pair of resistors (R1, R2)
in the configuration shown, to bias the negative end
to the middle of the encoder's output voltage range.
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Broken Wire and Illegal State Detection
The
encoder inputs (channel A+, A-, B+, B-) are monitored by the
FPGA (an on-board logic component). The encoder inputs are
sampled at 20mHz. By default, a digital filter is applied
to each encoder input. This digital filter requires that an
encoder input (channel A+, A-, B+, B-) be stable for 4 clock
cycles (200 nanoseconds) before a transition is recognized,
i.e., encoder input states lasting less than 4 clock cycles
are filtered out.
 

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