bussing between XMP controllers and hosting computers is similar
in all cases, regardless of whether the controller is configured
for PCI, CPCI, or PMC busses, or the choice of operating systems.
The host communicates with the XMP using direct memory reads/writes
over a 32-bit bus. The full DSP internal memory (128k bytes),
external SRAM, and FLASH memory are accessible to the host,
in a 32-bit flat memory window of 8 Mbytes in the PCI (or CPCI)
memory map. The host bus interface includes system registers
for host control of Reset, Write and Interrupt
enables, system configuration, control and status.