motion block provides up to five encoder interfaces (4 axes plus
1 auxiliary), with the following features:
MHz maximum count rate (5 MHz quadrature cycle)
wire and illegal state detection
five (5) encoders allows an encoder to each axis, plus a fifth
encoder for master-slave, master-cam or dual-loop operations.
Each motion block has features for position capture and position
compare. Digital noise filtering is enabled by default and limits
the maximum count rate to 10 MHz (2.5 MHz quadrature cycle).
motion block maintains a set of ten 32-bit data capture registers
(in hardware), used to store latched positions. The ten data
capture registers are shared among the five encoder interfaces
of each motion block. A specific capture register can be associated
with any encoder (position) counter. Each capture register can
be triggered by one of the five events (one from each of the
five encoder interfaces). One event can trigger any number of
captures, allowing probe capture of multiple axes.
Capture Registers/Position Counters
free-running, 32-bit position counter for any axis can be
latched on the edge of an input. The latency
for position capture is sub-microsecond, because the registers
are implemented in hardware. The input source and polarity
are configurable. The capture event can trigger on any of:
available RS-422 transceiver inputs per motion block
Index_in (per axis)
Home_in (per axis)
the capture event trigger can be enabled or disabled with
logic may be triggered from any one of the five Event look-up
tables in a given motion block FPGA (one Event look-up table
per axis, plus one spare table). Each Event look-up table
has seven inputs. These signals are the three Xcvr signals
for that axis plus Home, Pos_LIM, Neg_LIM and Index. The Event
look-up table can be configured to use either polarity of
any one input or combinations of inputs (for example, capture
data if Home is low and Index is high).
processing for data capture.
the Capture 0 register is normally used to capture the encoder
(position) count for Axis 0, you can also use Capture 0 to
capture the encoder counts for the other axes in that motion
block (Axis 1,2,3), individually or as a group. Note that
Capture events cannot cross between motion blocks, although
you can work around this by externally wiring the axis inputs
among multiple motion blocks.
wiring between motion blocks.
motion block has a hardware register file of sixteen 32-bit
registers which are used to provide compare setpoints. The sixteen
registers are shared among the four axes. Buffer modes can be
set up as FIFO or circular, so that compare events can occur
faster than the servo update rate. Compare latency is less than
compare event can set a Position_Compare output on any
of the twelve available RS-422 transceiver outputs. The compare
event status is also available to the DSP. The trigger event
is software-configurable and will occur when the value loaded
in the position compare register is either:
greater than the actual position
equal to the actual position
less than the actual position
addition, the equality condition can be either transparent or
latched. Note that the latched condition can be cleared. The
Position_Compare output polarity is programmable and
the compare output can be disabled. The register can also be
read back by the host.
Interpolation Modules (SIM4)
encoders with sinusoidal outputs, the scale interpolation module
provides increased position resolution for up to four axes.
These outputs produce one cycle of sine and cosine analog signals
for each encoder's line pair. At every sample, the scale interpolation
module reads the sine and cosine
levels and determines the angular position within the line pair.
The sine and cosine outputs are also routed to the standard
quadrature inputs, providing coarse position information.
quadrature inputs generate 4 counts for every line pair, and
the 12-bit interpolated value generates 4096 counts for each
line pair. The full interpolated position is obtained by combining
the number of quadrant counts divided by 4, with the
position between two encoder lines. Essentially, the 12-bit
scale interpolation provides a resolution increase of 1024 over
the quadrature counters. To maintain accurate phase information,
the sine and cosine signals are captured with simultaneous-sampling
implement the position compare feature, the SIM4 compares the
current position to a position latched in the FPGA. The A/D
converters convert continuously, with a 10µsec latency.
compare registers are available per SIM4 (4 axes).
compare two positions per servo cycle on 4 axes,
or can compare 10 positions per servo cycle on 1 axis.
from compare event to compare = 10µsec.
implement the position capture feature, the SIM4 latches the
full interpolated position when the user-supplied latch signal
axes can be latched independently of each other.
capture registers are available per SIM4 (4 axes)
capture two times per servo cycle on 4 axes,
or can capture 10 times per servo cycle on 1 axis
from capture event to capture = 5 μsec
detailed information about SIM4 modules, please see Application