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INDEX |
A
Active
high wiring CH3: Drive
Enable Wiring
Active low wiring CH3:
Drive Enable Wiring
ADC CH6: Analog Inputs
AGnd CH:3 Analog Inputs
Amp Enable CH3: Drive
Enable Wiring
Amp Fault Input CH3:
Drive Enable Wiring
Amp Polarity CH3: Drive
Enable Wiring
Amp_En_Collector CH3:
Drive Enable Wiring
Amp_En_Emitter CH3:
Drive Enable Wiring
Amp_Flt_IN CH3: Drive
Enable Wiring
Amp_Flt_Rtn CH3: Drive
Enable Wiring
Analog Devices:
21061 floating point DSP
(SHARC) CH6: SHARC
DSP Processor Subsystem
Analog Drives:
amplifier enabling CH3:
Drive Enable Wiring
command signal CH3:
Connect to Analog Servo Amplifiers
configuring CH3:
Configuring Analog Connections
connections to servo motors
CH3: Configuring Analog
Connections
connections to step motors
CH3: Configuring Analog
Connections
electrical requirements CH1:
Host Computer Electrical Requirements
wiring CH3:
Drive Enable Wiring
Analog Inputs CH:3
Analog Inputs
Analog inputs CH6:
Analog Inputs
Analog power supply CH6:
Architectural Overview
Analog_IN CH:3 Analog
Inputs
Auxiliary DAC CH6:
Analog Inputs
B
Bi-directional opto-inputs and -outputs CH1:
Host Computer Electrical Requirements
Bios CH6: Analog Inputs
Boot-up (motion application) CH6:
XMP Data Architecture
Broken wire detection CH3:
Connect System I/O
Brush servo motors
connection to XMP controllers
CH3: Configuring Analog
Connections
Bus interface CH2:
Introduction , CH2:
PMC Bus , CH6:
Host Bus
expansion boards CH2:
CPCI-6U Bus
Riptide CH6:
XMP Data Architecture
XMP-CPCI-3U CH2:
CPCI-3U Bus
XMP-CPCI-6U CH2:
CPCI-6U Bus
XMP-PCI CH5:
PCI Bus
XMP-PMC CH2:
PMC Bus
C
Cable
bend radius limits in SERCOS
CH5: SERCOS Connection
Hardware
fiber optic CH5:
Introduction , CH5:
SERCOS Connection Hardware , CH5:
XMP-SERCOS Connector Ports
SERCOS CH5:
Introduction , CH5:
SERCOS Connection Hardware
Cable, VHDCI CH4: Introduction
Capture CH6: XMP Data
Architecture
CBL-68 cable CH4: Introduction
Clock generator CH6:
Architectural Overview
Cmd_Dac_OUT CH3: Connect
to Analog Servo Amplifiers
Command voltage output CH6:
Analog Inputs
Common Gnd logic CH3:
Connect System I/O
Common Vcc logic CH3:
Connect System I/O
Connection
SERCOS CH5:
SERCOS Connection Hardware
STC-136 CH3:
Introduction
VHDCI CH4:
Introduction
XMP-analog I/O CH4:
Introduction
Control objects CH6:
XMP Data Architecture
CPCI
bus connectors CH2:
SERCOS Connection Hardware , CH2:
XMP Controller Installation
CPCI-3U
bus connector CH4:
CPCI-3U
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
XMP controller installation
CH1: XMP Controller
Installation
CPCI-6U
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
SERCOS CH5: XMP-SERCOS
Connector Ports
XMP controller installation
CH1: XMP Controller
Installation
D
DAC
auxiliary CH6:
Analog Inputs
calibration and activation
CH6: SHARC DSP Processor
Subsystem
circuitry CH6:
Analog Inputs
DACs in Motion Blocks CH6:
Analog Inputs
output protection CH6:
Analog Inputs
output response to resets
CH6: Analog Inputs
outputs CH6:
Analog Inputs
servo command output CH6:
Analog Inputs
DACs CH6: Digital-to-Analog
Converter (DAC) Subsystem
Data architecture CH6:
Analog Inputs
Dedicated opto-inputs, specifications CH1:Host
Computer Electrical Requirements
Dedicated opto-outputs, specifications CH1:
Host Computer Electrical Requirements
Delete objects CH6:
XMP Data Architecture
Device driver CH6:
XMP Data Architecture
Devices window CH6:
XMP Data Architecture
Differential encoders CH3:
Introduction 3
Digital noise filtering, encoder CH6:
Host Bus
Digital-to-analog (DAC)
outputs CH6:
Analog Inputs
Digital-to-analog converter (DAC) CH6:
Digital-to-Analog Converter (DAC) Subsystem
DSP CH6: SHARC DSP
Processor Subsystem
(diagram) CH6:
SHARC DSP Processor Subsystem
DSP RAM CH6: SHARC
DSP Processor Subsystem
Dual-loop control CH3:
Drive Enable Wiring
E
Ejectors, and CPCI boards CH1:
XMP Controller Installation , CH1:
XMP Controller Installation
Electrical requirements
encoders
CH1: Host Computer Electrical Requirements,
CH1: Host Computer
Electrical Requirements
input voltages CH3:
Introduction
XMP controller
CH1: Host Computer Electrical Requirements
Electrostatic discharge (ESD)
installation precautions
CH1: XMP Controller
Installation
Enc CH3: Introduction
3, CH3:
Drive Enable Wiring
Encoders
broken wire detection CH3:
Connect System I/O , CH6:
Host Bus , CH6:
SHARC DSP Processor Subsystem
differential CH3:
Introduction 3
digital noise filtering CH6:
Host Bus
digital quadrature CH3:
Introduction 3
dual-loop CH3:
Drive Enable Wiring
Encoders (cont.)
electrical requirements
CH1: Host Computer Electrical Requirements,
CH1: Host Computer
Electrical Requirements
illegal state detection CH3:
Connect System I/O
inputs CH6:
Host Bus
single-ended CH3:
Drive Enable Wiring
wiring CH3:
Introduction 3
E-Stop input CH3:
Connect System I/O
ESTOP_IN CH3: Connect
System I/O
Expansion board CH6:
Analog Inputs , CH6:
Analog Inputs
Expansion boards
bus connectivity CH2:
Introduction
connection to main CH2:
Introduction
F
Fail safe wiring CH3:
Drive Enable Wiring
Fault monitor CH6:
Analog Inputs
Field programmable field array (FPGA) CH6:
Analog Inputs
Field Programmable Gate Array (FPGA) CH6:
XMP Data Architecture
Flash memory CH6:
SHARC DSP Processor Subsystem , CH6:
Analog Inputs
Form factors
CPCI-3U CH1:
XMP Hardware , CH1:
XMP Hardware
CPCI-6U CH1:
XMP Hardware , CH1:
XMP Hardware
PCI CH1:
XMP Hardware , CH1:
XMP Hardware
PMC CH1:
XMP Hardware , CH1:
XMP Hardware
FPGA (Field Programmable Field Array) CH6:
Analog Inputs
FPGA (Field Programmable Gate Array) CH6:
XMP Data Architecture
G
Generator, clock CH6:
Architectural Overview
H
Hard reset CH6: Analog
Inputs
HFBR-1505 transmitter, specifications
CH5: Introduction
HFBR-2505A receiver, specifications
CH5: Introduction
Home event CH6: XMP
Data Architecture
Home sensors CH3:
Connect System I/O
Home_IN CH3: Connect
System I/O , CH3:
Connect System I/O
HomeLim_Rtn CH3: Connect
System I/O , CH3:
Connect System I/O , CH3:
Connect System I/O , CH3:
Drive Enable Wiring
Homing CH6: XMP Data
Architecture
I
IDNs CH5: SERCOS Connection
Hardware
Illegal state detection CH3:
Connect System I/O
Initialization (controller) CH6:
SHARC DSP Processor Subsystem
Input-output (I/O)
analog inputs CH6:
Analog Inputs
backplane connection CH3:
Introduction
bi-directional opto-inputs
CH1: Host Computer
Electrical Requirements
bi-directional opto-outputs
CH1: Host Computer
Electrical Requirements
connectors CH4:
Introduction
digital-to-analog (DAC) CH6:
Analog Inputs
opto-input specifications
CH1:Host Computer Electrical
Requirements
optoisolation CH3:
Introduction
opto-output specifications
CH1: Host Computer
Electrical Requirements
SERCOS
CH5: Introduction
CH5: Assistance with SERCOS Networks
STC-136 terminal blocks CH3:
Introduction
XMP-CPCI-3U
CH4: CPCI-3U
XMP-CPCI-6U CH4:
Introduction CH2:
PCI Bus
XMP-PCI
CH4: XMP-PCI
CH5: SERCOS Connection Hardware
XMP-PMC
CH4: XMP-SERCOS-PMC,
CH5: Introduction
CH5: Assistance with SERCOS Networks
Installation
XMP controllers CH1:
XMP Hardware CH2:
Introduction
XMP-CPCI-3U controllers CH1:
XMP Controller Installation
XMP-CPCI-6U controllers CH1:
XMP Controller Installation
XMP-PCI controllers CH1:
XMP Controller Installation
XMP-PMC controllers CH1:
XMP Controller Installation
Interface CPLD CH6:
Analog Inputs
J
J0-1 (VHDCI connector on XMP-PCI)
CH4: XMP-PCI
J10-11 (VHDCI connector on XMP-PCI) CH4:
XMP-PCI
J1CH2: PMC Bus
(VHDCI connector on XMP-PCI) CH4:
XMP-PCI
J1CH4: XMP-PCI
(VHDCI connector on XMP-PCI) CH4:
XMP-PCI
J2 (backplane connector on XMP-CPCI-3U)
CH4: CPCI-3U
JCH5: PCI Bus
(VHDCI connector on XMP-PCI) CH4:
XMP-PCI
J3 (backplane connector on XMP-CPCI-6U, expansion)
CH4: CPCI-6U Expansion Board, Backplane Connectors
J3 (backplane connector on XMP-CPCI-6U, main)
CH4: CPCI-6U
J4 (backplane connector on XMP-CPCI-6U) CH4:
XMP-PCI, CH4:
CPCI-6U Expansion Board, Backplane Connectors
J4-5 (VHDCI connector on XMP-PCI) CH4:
XMP-PCI
J5 (backplane connector on XMP-CPCI-6U, expansion)
CH4: CPCI-6U Expansion Board, Backplane Connectors
J5 (backplane connector on XMP-CPCI-6U, main) CH4:
XMP-PCI
J6-7 (VHDCI connector on XMP-PCI) CH4:
XMP-PCI
J8-9 (VHDCI connector on XMP-PCI) CH4:
XMP-PCI
L
Latency for position capture CH6:
Host Bus
Lattice CH6: Analog
Inputs
Limit sensors CH3:
Connect System I/O
Limit switches CH6:
XMP Data Architecture
M
Main board CH6: Analog
Inputs , CH6:
Analog Inputs
Memory map, XMP CH6:
Analog Inputs
Motion blocks CH6:
Analog Inputs , CH6:
Analog Inputs , CH6:
SHARC DSP Processor Subsystem
Motion Console
amp enable CH3:
Drive Enable Wiring
amp polarity CH3:
Drive Enable Wiring
amplifier enabling CH3:
Drive Enable Wiring
configuring stepper motors
CH3: Configuring Analog
Connections
XCVR inversion CH3:
Configuring Analog Connections
Motor blocks CH6:
Analog Inputs , CH6:
Analog Inputs
Motors
brush servo CH3:
Configuring Analog Connections
brushless servo CH3:Configuring
Analog Connections
open-loop step CH3:
Configuring Analog Connections
Multiplexers CH6:
Analog Inputs
N
Neg_Lim_IN CH3: Connect
System I/O , CH3:
Connect System I/O
Nodes, SERCOS CH5:
Introduction
Noise filtering, (digital) in encoder CH6:
Host Bus
O
Open-loop step motors CH3:
Configuring Analog Connections
Optical power, SERCOS CH5:
SERCOS Connection Hardware
Origin CH6: XMP Data
Architecture
P
PCI CH6: Analog Inputs
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
XMP-PCI controller installation
CH1: XMP Controller
Installation
PIDNs CH5: SERCOS Connection
Hardware
Platforms
LynxOS CH1:
XMP Hardware
PharLap CH1: XMP Hardware
QNX CH1:
XMP Hardware
VenturComRTSS CH1:
XMP Hardware
VxWorks CH1:
XMP Hardware
Windows2000 CH1:
XMP Hardware
Windows95/98 CH1:
XMP Hardware
WindowsNT CH1:
XMP Hardware
PMC
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
SERCOS CH5:
XMP-SERCOS Connector Ports
XMP-PMC controller installation
CH1: XMP Controller
Installation
Pos_Lim_IN CH3: Connect
System I/O , CH3:
Connect System I/O
Position capture
for Motion Blocks CH6:
Host Bus
in scale interpolation
CH6: Host Bus
Position compare, in scale interpolation
CH6: Host Bus
Position error CH6:
SHARC DSP Processor Subsystem
Power supervisor CH6:
Analog Inputs
Power supply, analog CH6:
Architectural Overview
Power-up sequence CH6:
Analog Inputs
R
Reset
hard CH6:
Analog Inputs
soft CH6:
Analog Inputs
RESET_IN CH3: Drive
Enable Wiring
Resets CH6: Analog
Inputs
DAC output response to CH6:
Analog Inputs
Ribbon cable (main-expansion boards)
CH2: Introduction
Rings, SERCOS CH5:
Introduction
Riptide CH6: XMP Data
Architecture
RS422 receiver, specifications CH1:
Host Computer Electrical Requirements
RS422 transmitter, specifications CH1:
Host Computer Electrical Requirements
Rx, SERCOS receiver CH5:
XMP-SERCOS Connector Ports
S
Safety precautions
amplifier enabling CH3:
Drive Enable Wiring
braking CH3:
Drive Enable Wiring
electrostatic discharge (ESD)
CH1: XMP Controller
Installation
emergency stop CH3:
Drive Enable Wiring
E-stop input CH3:
Connect System I/O
fail safe wiring CH3:
Drive Enable Wiring
installation CH1:
XMP Controller Installation
power CH1:
XMP Controller Installation
safety zones CH1:
XMP Controller Installation
sudden movement CH1:
XMP Controller Installation
Scale interpolation
SIM4 module CH1: Expansions
and Add-ons
Scale interpolation module CH6:
Host Bus
position capture
CH6: Host Bus
position compare
CH6: Host Bus
sine and cosine levels
CH6: Host Bus
SERCOS CH5: Introduction,
CH5: Assistance with
SERCOS Networks, CH6:
Analog Inputs
cable bend radius CH5:
SERCOS Connection Hardware
connectors CH5:
SERCOS Connection Hardware
data rate CH5:
XMP-SERCOS Connector Ports
drive limitations CH5:
Introduction
IDNs CH5:
SERCOS Connection Hardware
initialization CH5:
SERCOS Connection Hardware
input-output (I/O)
CH5: Introduction,
CH5: Assistance with SERCOS Networks
nodes
CH5: Introduction
NRZI bit coding CH5:
XMP-SERCOS Connector Ports
optical power
CH5: Introduction ,
CH5: SERCOS Connection Hardware
rings
CH5: Introduction
telegrams
CH5: Introduction
XMP-CPCI-6U CH5:
XMP-SERCOS Connector Ports
XMP-PMC CH5:
XMP-SERCOS Connector Ports
Servo command output DAC CH6:
Analog Inputs
Servo motors
connection to XMP controller
CH3: Configuring Analog
Connections
SHARC DSP CH6: SHARC
DSP Processor Subsystem , CH6:
Analog Inputs
(diagram) CH6:
SHARC DSP Processor Subsystem
SIDNs CH5: SERCOS Connection
Hardware
SIM4 CH6: Host Bus
SIM4 module CH1: Expansions
and Add-ons, CH6:
Architectural Overview
Sine and cosine, in scale interpolation
CH6: Host Bus
Single-ended encoders CH3:
Drive Enable Wiring
Soft reset CH6: Analog
Inputs
SRAM, external CH6:
SHARC DSP Processor Subsystem
STC-136 terminal blocks CH3:
Introduction , CH4:
Introduction CH3:
Connect to Analog Servo Amplifiers
STC-136 terminal connection block CH3:
Introduction
Step motors
connection to XMP controller
CH3: Configuring Analog
Connections
open-loop CH3:
Configuring Analog Connections
Step-and-direction motors
connection to XMP controller
CH3:Configuring Analog
Connections
Stepper motors
closed loop CH3:
Configuring Analog Connections
configuring using Motion
Console CH3: Configuring
Analog Connections
loopback CH3:
Configuring Analog Connections
step/dir & CW/CCW specs CH3:
Connect to Digital Quadrature Encoders
supported in MPI CH3:
Drive Enable Wiring
System Reset Input CH3:
Introduction
T
Telegrams, SERCOS CH5:
Introduction
Terminal connection blocks
STC-136 CH3:
Introduction
Transceivers
analog XCVR A
CH4: XMP-PCI
analog XCVR B
CH4: XMP-PCI
analog XCVR C
CH4: XMP-PCI
analog XCVR D
CH4: XMP-PCI
analog XCVR E
CH4: XMP-PCI
analog XCVR F
CH4: Transceiver (XCVR) and User I/O Details
as Compare outputs CH3:
Connect System I/O
configuring CH3:
Connect to Digital Quadrature Encoders ,
CH4: XMP-PCI
electrical requirements CH1:
Host Computer Electrical Requirements
inverting CH3:
Configuring Analog Connections
SERCOS
CH5: Introduction
Trigger CH6: XMP Data
Architecture , CH6:
Analog Inputs
Troubleshooting
SERCOS networks
CH5: Assistance with SERCOS Networks
SERCOS optical power settings
CH5: SERCOS Connection
Hardware
wiring
CH4: Introduction
Tx, SERCOS transmitter CH5:
XMP-SERCOS Connector Ports
U
User I/O CH4: Transceiver
(XCVR) and User I/O Details
User I/O outputs CH3:
Drive Enable Wiring
UserIO CH3: Drive Enable
Wiring
UserIO_Rtn CH3: Drive
Enable Wiring
V
VHDCI cabling CH4:
Introduction
W
Watchdog timer CH6:
Analog Inputs
Wiring, motor CH3:
Configuring Analog Connections, CH3:
Drive Enable Wiring
X
XCVR A functions CH4:
XMP-PCI
XCVR B functions CH4:
XMP-PCI
XCVR C functions CH4:
XMP-PCI
XCVR D functions CH4:
XMP-PCI
XCVR E functions CH4:
XMP-PCI
XCVR F functions CH4:
Transceiver (XCVR) and User I/O Details
XMP bus interface CH2:
Introduction -CH2:
PMC Bus
XMP Controller
analog drives CH1:
Host Computer Electrical Requirements
bus connectivity CH2:
Introduction
bus interface CH6:
Host Bus
connection to brush servo
motors CH3: Configuring
Analog Connections
connection to servo motors
CH3: Configuring Analog
Connections
connection to step motors
CH3: Configuring Analog
Connections
connection to step-and-direction
motors CH3:Configuring
Analog Connections
data architecture CH6:
Analog Inputs
device driver CH6:
XMP Data Architecture
dual-loop CH3:
Drive Enable Wiring
electrical requirements
CH1: Host Computer Electrical Requirements
encoders
CH1: Host Computer Electrical Requirements,
CH1: Host Computer
Electrical Requirements
expansion board CH6:
Analog Inputs , CH6:
Analog Inputs
expansion boards
CH1: Expansions and Add-ons,
CH3: Connect System
I/O
faults CH6:
Analog Inputs
hardware CH1:
XMP Hardware , CH1:
XMP Controller Installation
hardware architecture
CH6: Architectural Overview CH6:
XMP Data Architecture
homing CH6:
XMP Data Architecture
initialization CH6:
SHARC DSP Processor Subsystem
installation CH1:
XMP Controller Installation , CH1:
XMP Controller Installation
main board CH6:
Analog Inputs , CH6:
Analog Inputs
main-expansion connector
CH2: Introduction
memory subsystem CH6:
Analog Inputs
model numbers CH1:
XMP Controller Configurations
motion blocks CH6:
Analog Inputs , CH6:
Analog Inputs ,
CH6: SHARC DSP Processor Subsystem
motor blocks CH6:
Analog Inputs , CH6:
Analog Inputs
XMP Controller (cont.)
resets CH6:
Analog Inputs
safety precautions CH1:
XMP Controller Installation
SERCOS networks
CH5: Assistance with SERCOS Networks
SIM4 module CH1: Expansions
and Add-ons
voltage and current specifications
CH1: Host Computer
Electrical Requirements
XMP-CPCI-3U bus interface CH2:
CPCI-3U Bus
XMP-CPCI-3U input-output (I/O) CH4:
CPCI-3U
XMP-CPCI-6U bus interface CH2:
CPCI-6U Bus
XMP-CPCI-6U expansion boards CH2:
CPCI-6U Bus
XMP-CPCI-6U input-output (I/O) CH4:
Introduction, CH2:
PCI Bus
XMP-PCI bus interface CH5:
PCI Bus
XMP-PCI input-output (I/O) CH4:
XMP-PCI , CH5:
SERCOS Connection Hardware
XMP-PMC bus interface CH2:
PMC Bus
XMP-PMC input-output (I/O) CH4:
XMP-SERCOS-PMC
XMP hardware CH1: XMP
Hardware -CH1:
XMP Controller Installation
XMP interface
XMP-analog CH1: XMP
Hardware
XMP-SERCOS CH1: XMP
Hardware
XMP-analog
electrical requirements CH1:
Host Computer Electrical Requirements
XMP-analog hardware CH4:
Introduction,
CH4: Transceiver (XCVR) and User I/O Details
XMP-CPCI-3U
bus interface CH2:
CPCI-3U Bus
controller installation CH1:
XMP Controller Installation
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
input-output (I/O)
CH4: CPCI-3U
XMP-CPCI-6U
bus interface CH2:
CPCI-6U Bus
controller installation CH1:
XMP Controller Installation
expansion boards CH2:
CPCI-6U Bus
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
input-output (I/O) CH4:
Introduction CH2:
PCI Bus
XMP-PCI
bus interface CH5:
PCI Bus
controller installation CH1:
XMP Controller Installation
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
input-output (I/O)
CH4: XMP-PCI , CH5:
SERCOS Connection Hardware
XMP-PMC
bus interface CH2:
PMC Bus
controller installation CH1:
XMP Controller Installation
form factor CH1:
XMP Hardware , CH1:
XMP Hardware
input-output (I/O)
CH4: XMP-SERCOS-PMC
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